TEAM PROJECT · LOGIC DESIGN LAB, NDU

TTL LogicGate Clock

A digital clock and alarm system built entirely from discrete 7400-series TTL logic gates and counters. No microcontroller, no code. 12-hour (with AM/PM) or 24-hour display, a comparator-driven alarm, and every control set by hand.

THE GOAL

Final project for NDU's Logic Design Lab: build a fully working digital clock and alarm using nothing but discrete logic (counters, comparators, and gates), with no microcontroller and no firmware anywhere in the design. Built as a four-person team.

  • Separate counter chains for hours, minutes, and seconds, driven by a 555 timer's one-second pulse
  • Switches between 12-hour (with AM/PM) and 24-hour display
  • A 7485 comparator continuously checks the current time against a user-set alarm time
  • Time and alarm are both set entirely by hand, no software interface
  • 4026 decade counters drive the 7-segment displays directly, no display driver code
Finished TTL logic gate clock breadboard build showing hours, minutes, and seconds on 7-segment displays

FINAL BUILD

The finished clock across three breadboards: hours on the left, minutes and seconds in the middle, and the alarm set/indicator section on the right with its status LED and button.

HOW IT WORKS

A 555 timer astable oscillator generates the base one-second pulse that drives everything downstream. That pulse ripples through 4026 decade counters chained for seconds, minutes, and hours, each one driving its own 7-segment display directly. A 74157 multiplexer switches the display and counter inputs between normal run mode and set mode, so the hand-operated switches can load a new time or alarm value without disturbing the running clock. A 7485 4-bit comparator sits on the hour and minute counters and the alarm registers in parallel, watching for a match; when it finds one, it trips the alarm output. AND/OR gates (7408, 7432, 74HC21, 74HC86) handle the 12/24-hour mode logic and the AM/PM rollover, while 7474 D flip-flops latch which mode the clock is currently in.

Full circuit schematic of the TTL logic gate clock, showing all counter, comparator, and gate connections

FULL CIRCUIT MAP

The complete connection diagram: every counter, comparator, and gate in the design, from the 555 timer's pulse generator on the bottom right to the alarm LEDs at the top.

SOURCE ↗

CLOCK SOURCE555 TIMER
COUNTERS4026 DECADE + 7-SEGMENT DRIVE
ALARM7485 4-BIT COMPARATOR
DISPLAY MUX74157 QUAD 2-TO-1
LOGIC7408 · 7432 · 74HC21 · 74HC86
MODE LATCH7474 D FLIP-FLOP